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M7040N データシート(PDF) 8 Page - STMicroelectronics

部品番号 M7040N
部品情報  64K x 72-bit Entry NETWORK PACKET SEARCH ENGINE
PDF  159 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M7040N データシート(HTML) 8 Page - STMicroelectronics

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Table 2. Signal Names
Note: 1. Signal types are: I = Input only; I/O = Input or Output; O = Output; and T = Tristate
See DESCRIPTIONS FOR CONNECTION DIAGRAM (Figure 3, page 9), page 152 for individual connection details.
2. In the previous versions of this specification, this signal was called, “CLK_OUT.”
3. In previous versions of this specification, this signal was called, “PLL_BYPASS.”
4. ACK and EOT Signals require a weak, external pull-down resistor of 47 K
Ω or 100 KΩ.
Symbol
Type(1)
Description
Clocks and Reset
CLK_MODE
I
Clock Mode
CLK2X_CLK1X
I
Master Clock
PHS_L
I
Phase
TEST_CO(2)
I
Test Output (ST Use Only)
TEST
I
Test Input (ST Use Only)
TEST_FM
I
Test Input (ST Use Only)
RST_L
I
Reset
TEST_PB(3)
I
Test Input (ST Use Only)
CFG_L
I
Configuration
Command and DQ Bus
CMD[10:0]
I
Command Bus
CMDV
I
Command Valid
DQ[71:0]
I/O
Address/Data Bus
ACK(4)
T
READ Acknowledge
EOT(4)
T
End of Transfer
SSF
T
SEARCH Successful Flag
SSV
T
SEARCH Successful Flag
Valid
MULTI_HIT
O
Multiple Hit Flag
HIGH_SPEED
I
100MHz Indicator
CLKTUNE[3:0]
I
PLL Tuner
SRAM Interface
SADR[23:0]
T
SRAM Address
CE_L
T
SRAM Chip Enable
WE_L
T
SRAM Write Enable
OE_L
T
SRAM Output Enable
ALE_L
T
Address Latch Enable
Cascade Interface
LHI[6:0]
I
Local Hit In
LHO[1:0]
O
Local Hit Out
BHI[2:0]
I
Block Hit In
BHO[2:0]
O
Block Hit Out
FULI[6:0]
I
Full In
FULO[1:0]
O
Full Out
FULL
O
Full Flag
Device Identification
ID[4:0]
I
Device Identification
Supplies
VDD
n/a
Chip Core Supply (1.5V for
66 and 83MSPS; 1.65 for
100MSPS)
VDDQ
n/a
Chip I/O Supply (2.5 or
3.3V)
Test Access Port
TDI
I
Test Access Port’s Test
Data In
TCK
I
Test Access Port’s Test
Clock
TDO
T
Test Access Port’s Test
Data Out
TMS
I
Test Access Port’s Test
Mode Select
TRST_L
I
Test Access Port’s Reset



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