データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

AS1100WL データシート(PDF) 4 Page - ams-OSRAM AG

部品番号 AS1100WL
部品情報  Ser ial ly Inter faced, 8-Digi t LED Dr iver
PDF  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  AMSOSRAM [ams-OSRAM AG]
ホームページ  https://ams-osram.com/
Logo AMSOSRAM - ams-OSRAM AG

AS1100WL データシート(HTML) 4 Page - ams-OSRAM AG

  AS1100WL Datasheet HTML 1Page - ams-OSRAM AG AS1100WL Datasheet HTML 2Page - ams-OSRAM AG AS1100WL Datasheet HTML 3Page - ams-OSRAM AG AS1100WL Datasheet HTML 4Page - ams-OSRAM AG AS1100WL Datasheet HTML 5Page - ams-OSRAM AG AS1100WL Datasheet HTML 6Page - ams-OSRAM AG AS1100WL Datasheet HTML 7Page - ams-OSRAM AG AS1100WL Datasheet HTML 8Page - ams-OSRAM AG AS1100WL Datasheet HTML 9Page - ams-OSRAM AG Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 18 page
background image
www.austriamicrosystems.com/LED-Driver-ICs/AS1100
Revision 1.37
2 - 16
AS1100
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Number
Pin Name
Description
1
DIN
Data input. Data is programmed into the 16Bit shift register on the rising CLK edge
2, 3, 5:8, 10, 11
DIG 0 : DIG 7
8 digit driver lines that sink the current from the common cathode of the display. In shutdown
mode the AS1100 switches the outputs to VDD.
4, 9
GND
Both GND pins must be connected.
12
LOAD/CS
Strobe input. With the rising edge of the LOAD signal the 16 bit of serial data is latched into
the register.
13
CLK
Clock input. The interface is capable to support clock frequencies up to 10MHz. The serial
data is clocked into the internal shift register with the rising edge of the CLK signal. On the
DOUT pin the data is applied with the falling edge of CLK.
14:17, 20:23
SEGA:G, DP
Seven segment driver lines including the decimal point. When a segment is turned off the
output is connected to GND.
18
ISET
The current into ISET determines the peak current through the segments and therefore the
brightness.
19
VDD
Positive Supply Voltage (+5V)
24
DOUT
Serial data output for cascading drivers. The output is valid after 16.5 clock cycles. The
output is never set to high impedance.
11
12
13
14
15
16
17
18
19
20
21
22
23
DIG4
AS1100
10
1
2
3
4
5
6
7
8
9
24 DOUT
DIN
DIG0
GND
DIG6
DIG2
GND
DIG3
LOAD
SEG D
SEG DP
SEG E
SEG C
VDD
ISET
SEG G
SEG B
SEG F
SEG A
CLK
DIG7
DIG5
DIG1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com