M48T02 datasheet(11/19 Pages) STMICROELECTRONICS

11 / 19 page

11/19

M48T02, M48T12

Figure 10. Power Down/Up Mode AC Waveforms

Note: Inputs may or may not be recognized at this time. Caution should be taken to keep E high as VCC rises past VPFD (min). Some systems

may perform inadvertent WRITE cycles after VCC rises above VPFD (min) but before normal system operations begin. Even though a

power on reset is being applied to the processor, a reset condition may not occur until after the system clock is running.

Table 9. Power Down/Up AC Characteristics

Note: 1. Valid for Ambient Operating Temperature: TA = 0 to 70°C; VCC = 4.75 to 5.5V or 4.5 to 5.5V (except where noted).

2. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200µs after VCC pass-

es VPFD (min).

3. VPFD (min) to VSS fall time of less than tFB may cause corruption of RAM data.

Table 10. Power Down/Up Trip Points DC Characteristics

Note: 1. All voltages referenced to VSS.

2. Valid for Ambient Operating Temperature: TA = 0 to 70°C; VCC = 4.75 to 5.5V or 4.5 to 5.5V (except where noted).

3. At 25°C; VCC = 0V.

Symbol

Parameter(1)

Min

Max

Unit

tPD

E or W at VIH before Power Down

0µs

(2)

VPFD (max) to VPFD (min) VCC Fall Time

300

µs

tFB

(3)

VPFD (min) to VSS VCC Fall Time

µs

VPFD (min) to VPFD (max) VCC Rise Time

0µs

tRB

VSS to VPFD (min) VCC Rise Time

1µs

tREC

E or W at VIH before Power Up

2ms

Symbol

Parameter(1,2)

Min

Typ

Max

Unit

VPFD

Power-fail Deselect Voltage

M48T02

4.5

4.6

4.75

M48T12

4.2

4.3

4.5

VSO

Battery Back-up Switchover Voltage

3.0

tDR

(3)

Expected Data Retention Time

YEARS

AI00606

VCC

INPUTS

(PER CONTROL INPUT)

OUTPUTS

DON'T CARE

HIGH-Z

tFB

tREC

tPD

tRB

tDR

VALID

NOTE

(PER CONTROL INPUT)

RECOGNIZED

VPFD (max)

VPFD (min)

VSO

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