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ST6G3240 データシート(PDF) 16 Page - STMicroelectronics

部品番号 ST6G3240
部品情報  Dual supply level translator for dual memory cards (mini SD/micro SD managed NAND)
PDF  29 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST6G3240 データシート(HTML) 16 Page - STMicroelectronics

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Electrical characteristics
ST6G3240
16/29
Table 12.
VCCA = 1.8 V ± 0.15 V
Parameter
From
(input)
To
(output)
VCCBn =1.8
V ± 0.15 V
VCCBn=2.5V
± 0.2V
VCCBn=3.0
± 0.3 V
VCCBn =3.3
V ± 0.3V
Unit
Min
Max
Min
Max
Min
Max
Min
Max
tPLHAB,
tPHLAB
Propagation
delay time from
A to B
(CL=15pF,
RL=2kΩ)
CMD.h
nCMD
8.5
5.5
5
5
ns
CLK.h
nCLK
8.5
5.5
5
5
CLK.h
CLK-f
17
11
10
10
DATx.h
nDATx
8.5
5.5
5
5
tPLHBA,
tPHLBA
Propagation
delay time from
B to A (
CL=7 pF,
RL=2kΩ )
nCMD
CMD.h
7
777
ns
nDATx
DATx.h
7
7
7
7
tPZL, tPZH
Output enable
time (
CL=7pF,
RL=2 kΩ )
INn
A
15
15
15
15
ns
Output enable
time (CL=15pF,
RL=2 kΩ )
INn
Bn
151515
15
tPLZ, tPHZ
Output disable
time (
CL=7pF,
RL=2kΩ )
INn
A
22
22
22
22
ns
Output disable
time (CL=15pF,
RL=2kΩ )
INn
Bn
222222
22
tDIR, enable
DIR
A
7
777
ns
DIR
B
8
888
tDIR, disable
DIR
A
5
555
ns
DIR
B
6
666
tOSLH,tOSH
L
Output to output
skew time(1)
1
111
ns
tCDLH,tCDH
L
Clock and data
skew time
1
111
ns
fmax
Clock
A
Bn
525252
52
MHz
Bn
A
525252
52
Data
A
Bn
104
104
104
104
Mbp
s
Bn
A
104
104
104
104
1.
Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the
same device switching in the same direction, either HIGH or LOW ( tOSLH = | tPLHm - tPLHn |, tOSHL = | tPHLm – tPHLn | )



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