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RIVA128 データシート(PDF) 53 Page - STMicroelectronics |
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RIVA128 データシート(HTML) 53 Page - STMicroelectronics |
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53 / 77 page  128-BIT 3D MULTIMEDIA ACCELERATOR RIVA 128 53/77 11.4 SERIAL INTERFACE The RIVA 128 serial interface supports connection to DDC1/2B, DDC2AB and DDC2B+ compliant monitors and to serial interface controlled video decoders and tuners. Supported video decoder chips include Philips SAA7110, SAA7111A, ITT 3225 and Samsung KS0127. For details of ad- dress locations and protocols applying to specific parts refer to the appropriate manufacturer’s datasheet. The serial interface in RIVA 128 requires operation under software control to provide emulation of the interface standard. RIVA 128 can act as a master for communication with slave devices like those mentioned above. It also acts as a master when in- terfacing to a DDC1/2 compatible monitor. Al- though it is not Access.bus compatible, it can com- municate with a DDC2AB compatible monitor via the DDC2B+ protocol. (No other Access.bus pe- ripherals can be attached although other serial de- vices may co-reside on the DDC bus). The RIVA 128 can clock stretch incoming messages in the event that the software handler is interrupted by another task. |
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