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L6228Q データシート(PDF) 12 Page - STMicroelectronics |
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L6228Q データシート(HTML) 12 Page - STMicroelectronics |
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12 / 32 page ![]() Circuit description L6228Q 12/32 4.2 Logic inputs Pins CONTROL, HALF/FULL, CLOCK, RESET and CW/CCW are TTL/CMOS and uC compatible logic inputs. The internal structure is shown in Figure 9. Typical value for turn-on and turn-off thresholds are respectively V th(ON)= 1.8 V and Vth(OFF)= 1.3 V. Pin EN (Enable) has identical input structure with the exception that the drain of the Overcurrent and thermal protection MOSFET is also connected to this pin. Due to this connection some care needs to be taken in driving this pin. The EN input may be driven in one of two configurations as shown in Figure 10 or Figure 11. If driven by an open drain (collector) structure, a pull-up resistor REN and a capacitor CEN are connected as shown in Figure 10. If the driver is a standard Push-Pull structure the resistor R EN and the capacitor C EN are connected as shown in Figure 11. The resistor REN should be chosen in the range from 2.2 k Ω to 180 kΩ. Recommended values for R EN and CEN are respectively 100 kΩ and 5.6nF. More information on selecting the values is found in the Overcurrent Protection section. Figure 9. Logic inputs internal structure Figure 10. EN pin open collector driving Figure 11. EN pin push-pull driving 5V D01IN1329 ESD PROTECTION 5V 5V OPEN COLLECTOR OUTPUT REN CEN EN D01IN1330 ESD PROTECTION 5V PUSH-PULL OUTPUT REN CEN EN D01IN1331 ESD PROTECTION |
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