データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

EM78P341 データシート(PDF) 21 Page - ELAN Microelectronics Corp

部品番号 EM78P341
部品情報  8-Bit Microprocessor with OTP ROM
PDF  102 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  EMC [ELAN Microelectronics Corp]
ホームページ  http://www.emc.com.tw
Logo EMC - ELAN Microelectronics Corp

EM78P341 データシート(HTML) 21 Page - ELAN Microelectronics Corp

Back Button EM78P341 Datasheet HTML 17Page - ELAN Microelectronics Corp EM78P341 Datasheet HTML 18Page - ELAN Microelectronics Corp EM78P341 Datasheet HTML 19Page - ELAN Microelectronics Corp EM78P341 Datasheet HTML 20Page - ELAN Microelectronics Corp EM78P341 Datasheet HTML 21Page - ELAN Microelectronics Corp EM78P341 Datasheet HTML 22Page - ELAN Microelectronics Corp EM78P341 Datasheet HTML 23Page - ELAN Microelectronics Corp EM78P341 Datasheet HTML 24Page - ELAN Microelectronics Corp EM78P341 Datasheet HTML 25Page - ELAN Microelectronics Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 21 / 102 page
background image
EM78P341N/342N/343N
8-Bit Microprocessor with OTP ROM
Product Specification (V1.0) 12.01.2006
• 15
(This specification is subject to change without further notice)
6.1.10 RA (ADOC: ADC Offset Calibration Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CALI
SIGN
VOF[2]
VOF[1]
VOF[0]
“0”
“0”
“0”
Bit 7 (CALI):
Calibration enable bit for ADC offset
0 = Calibration disable
1 = Calibration enable
Bit 6 (SIGN):
Polarity bit of offset voltage
0 = Negative voltage
1 = Positive voltage
Bit 5 ~ Bit 3 (VOF[2] ~ VOF[0]): Offset voltage bits
VOF[2]
VOF[1]
VOF[0]
EM78P342N/343N
ICE342N
0
0
0
0LSB
0LSB
0
0
1
2LSB
2LSB
0
1
0
4LSB
4LSB
0
1
1
6LSB
6LSB
1
0
0
8LSB
8LSB
1
0
1
10LSB
10LSB
1
1
0
12LSB
12LSB
1
1
1
14LSB
14LSB
Bit 2 ~ Bit 0:
Unimplemented, read as ‘0’
6.1.11 RB (ADDATA: Converted Value of ADC)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
When the AD conversion is completed, the result is loaded into the ADDATA. The
ADRUN bit is cleared, and the ADIF (see Section 6.1.14, RE (Interrupt Status 2 &
Wake-up Control Register)) is set.
RB is read only.
6.1.12 RC (ADDATA1H: Converted Value of ADC)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
1
0
“0”
“0”
“0”
“0”
AD11
AD10
AD9
AD8
When the AD conversion is completed, the result is loaded into the ADDATA1H. The
ADRUN bit is cleared, and the ADIF (see Section 6.1.14, RE (Interrupt Status 2 &
Wake-Up Control Register)) is set.
RC is read only



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com