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XLP320 データシート(PDF) 16 Page - Renesas Technology Corp

部品番号 XLP320
部品情報  XL Family of Low Phase Noise Quartz-based PLL Oscillators
PDF  23 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

XLP320 データシート(HTML) 16 Page - Renesas Technology Corp

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©2018-2022 Renesas Electronics Corporation
March 2, 2022
XL Datasheet
Revision History
Revision Date
Description of Change
March 2, 2022
Changed Output Duty Cycle minimum and maximum values in Table 12 and Table 13 from 45% to 47% and
55% to 53% respectively.
January 11, 2022
▪ Removed Aging parameters in Table 12 and Table 13.
▪ Added footnote 2 after Table 13.
December 1, 2021
Updated Frequency Stability values in Table 12 and Table 13.
November 23, 2021
Added Frequency Stability and Operating Temperature Decoder table after Ordering Information.
August 18, 2021
Moved XO and VCXO ordering information tables to be just after Pin Descriptions.
January 19, 2021
▪ Removed 4-pin package description table, figure, and package drawing references.
▪ Added footnote for pin 5 in Table 1.
▪ Added footnote under “Output Type” in XO Ordering Information.
January 12, 2021
Added Marking Diagrams section and updated Package Outline Drawings links.
October 27, 2020
Added pin counts to Output Type in XO ordering table.
September 21, 2020
Added typical IDD to tables. Added more frequency ranges to IDD tables. Updated H to be LVCMOS in order
code.
April 27, 2020
Updated ODC parameter. 2nd LVCMOS row to be changed from <= to > 62.5 MHz.
September 7, 2018
Updated frequency stability options value from ±20ppm to ±25ppm for -40°C to +85°C XO only.
June 25, 2018
▪ Updated Package Outline Drawings section.
May 4, 2018
▪ Added XO and VCXO options.
▪ Updated description and Features sections.
▪ Updated Package Outline Drawings section.
▪ Added VCXO Ordering Information decoder diagram.
January 12, 2018
Initial release.



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