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CAT660EVA データシート(PDF) 2 Page - Catalyst Semiconductor

部品番号 CAT660EVA
部品情報  100mA CMOS Charge Pump Inverter/Doubler
PDF  16 Pages
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メーカー  CATALYST [Catalyst Semiconductor]
ホームページ  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT660EVA データシート(HTML) 2 Page - Catalyst Semiconductor

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CAT660
2
Doc. No. MD-5000, Rev. W
PIN DESCRIPTIONS
Circuit Configuration
Pin Number
Name
Inverter Mode
Doubler Mode
Boost/FC
Oscillator Frequency
Open
10kHz typical
V+
80kHz typical, 40kHz minimum
2
CAP+
Charge pump capacitor. Positive terminal.
Same as inverter.
3
GND
Power supply ground.
Power supply. Positive voltage input.
4
CAP-
Charge pump capacitor. Negative terminal.
Same as inverter.
5
OUT
Output for negative voltage.
Power supply ground.
6
LV
LV must be tied to OUT for all input
voltages.
8
V+
Power supply. Positive voltage input.
Positive voltage output.
Frequency Control for the internal oscilla-
tor. With an external oscillator BOOST/FC
has no effect.
Same as inverter.
Low-Voltage selection pin. When the input
voltage is less than 3V, connect LV to GND.
For input voltages above 3V, LV may be
connected to GND or left open. If OSC is
driven externally, connect LV to GND.
Oscillator control input. An external capacitor
can be connected to lower the oscillator
frequency. An external oscillator can drive
OSC and set the chip operating frequency.
The charge-pump frequency is one-half the
frequency at OSC.
Same as inverter. Do not overdrive
OSC in doubling mode. Standard logic
levels will not be suitable. See the
applications section for additional
information.
7
OSC
Oscillator Frequency
10kHz typical, 5kHz minimum
80kHz typical, 40kHz minimum
1
Boost/FC
PIN CONFIGURATION
8
7
6
5
1
2
3
4
BOOST/FC
CAP+
GND
CAP-
V+
OSC
LV
OUT
CAT
660
SOIC 8-Lead (V)
PDIP 8-Lead (L)
(Top View)
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ORDERING INFORMATION
Note: All packages are RoHS compliant.



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