Data Sheet

AD5273

Rev. J | Page 13 of 20

THEORY OF OPERATION

The AD5273 is a one-time programmable (OTP), set-and-forget,

6-bit digital potentiometer. The AD5273 allows unlimited 6-bit

adjustments prior to the OTP. OTP technology is a proven cost-

effective alternative over EEMEM in one-time memory program-

ming applications. The AD5273 employs fuse link technology to

achieve the memory retention of the resistance setting function.

It comprises six data fuses, which control the address decoder for

programming the RDAC, one user mode test fuse for checking setup

error, and one programming lock fuse for disabling any further

programming once the data fuses are programmed correctly.

ONE-TIME PROGRAMMING

Prior to OTP activation, the AD5273 presets to midscale during

power-on. After the wiper is set to the desired position, the resis-

tance can be permanently set by programming the T bit and the

one-time VDD_OTP to high and by coding the part properly (see

Figure 31). To blow the fuses to achieve a given nonvolatile setting,

the fuse link technology of the AD5273 requires a VDD_OTP from

5 V to 5.5 V for all end to end resistance options. During

operation, however, VDD can be 2.7 V to 5.5 V. Therefore, a

system supply that is lower than VDD_OTP requires an external

supply for OTP. The user is allowed only one attempt to blow

the fuses. If the user fails to blow the fuses on the first attempt,

the fuse structure may change such that they can never be

blown, regardless of the energy applied during subsequent

events. For details, see the Power Supply Considerations section.

The device control circuit has two validation bits, E1 and E0,

that can be read back in the read mode to check the program-

ming status, as shown in Figure 32. Users should always read

back the validation bits to ensure that the fuses are properly

blown. After the fuses have been blown, all fuse latches are

enabled upon subsequent power-on; therefore, the output

corresponds to the stored setting. Figure 30 shows a detailed

functional block diagram.

SDA Bit Definitions and Descriptions

S = start condition.

P = stop condition.

A = acknowledge.

X = don’t care.

T = OTP programming bit. Logic 1 programs wiper position

permanently.

D5, D4, D3, D2, D1, D0 = data bits.

E1, E0 = OTP validation bits.

0, 0 = ready to program.

0, 1 = test fuse not blown successfully. (For factory setup

checking purpose only. Users should not see these

combinations.)

1, 0 = fatal error. Do not retry. Discard the unit.

1, 1 = programmed successfully. No further adjustments

possible.

AD0 = I2C device address bit. Allows maximum of two

AD5273s to be addressed.

Figure 30. Detailed Functional Block Diagram

Figure 31. SDA Write Mode Bit Format

Figure 32. SDA Read Mode Bit Format

SDA

SCL

A

W

B

FUSES

EN

DAC

REG.

I2C INTERFACE

COMPARATOR

ONE-TIME

PROGRAM/TEST

CONTROL BLOCK

MUX

DECODER

FUSE

REG.

S0

1

0

1

1

0

AD0

0

A

T

XX

XXXX

XA

XX

D5

D4

D3

D2

D1

D0

A

P

SLAVE ADDRESS BYTE

INSTRUCTION BYTE

DATA BYTE

S

010110

AD0

1A

E1

E0

D5

D4

D3

D2

D1

D0

A

P

SLAVE ADDRESS BYTE

DATA BYTE