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74LVC2G66DP データシート(PDF) 1 Page - Nexperia B.V. All rights reserved |
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74LVC2G66DP データシート(HTML) 1 Page - Nexperia B.V. All rights reserved |
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1 / 26 page ![]() 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the analog switch is turned off. Schmitt trigger action at the enable inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 1.65 V to 5.5 V. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Very low ON resistance: 7.5 (typical) at V CC =2.7 V 6.5 (typical) at V CC =3.3 V 6 (typical) at V CC =5V Switch current capability of 32 mA High noise immunity CMOS low power consumption TTL interface compatibility at 3.3 V Latch-up performance meets requirements of JESD78 Class I ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Enable input accepts voltages up to 5.5 V Multiple package options Specified from 40 Cto+85 C and 40 Cto+125 C 74LVC2G66 Bilateral switch Rev. 9 — 15 December 2016 Product data sheet |
同様の部品番号 - 74LVC2G66DP |
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同様の説明 - 74LVC2G66DP |
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