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AD3552R データシート(PDF) 4 Page - Analog Devices

部品番号 AD3552R
部品情報  Precision Low Latency Development Kit
PDF  7 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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AD3552R データシート(HTML) 4 Page - Analog Devices

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Circuit Note
CN-0584
analog.com
Rev. 0 | 4 of 7
Figure 9 shows the frequency response of the output path, with
ideal waveforms generated in software, loaded into a cyclic buffer,
and written to the DAC. Slightly less attenuation is seen in this
plot due to the lower latency when compared to the full loopback
measurement, which must pass samples to the FPGA and back.
Figure 9. DAC Output Frequency Response
POWER ARCHITECTURE
All power for the CN0584 is provided by the CN0585 through the
AFE connector.
The CN0584 uses the +15 V and -15 V rails to provide the positive
and negative supply voltages for the ADG5421F input protection
switches. The +12 V and -12 V rails provide the positive and
negative supply voltages for the ADA4898-1 ADC buffer amplifiers.
The +3.3 V rail powers the EEPROM circuit.
SOFTWARE OVERVIEW
Python
The CN0584 can be interfaced to Python using the pyADI-IIO
library, which enables device configuration, capture of incoming
samples from the ADCs, and generation of waveforms to be trans-
mitted by the DACs. The output waveforms can then be pre- or
post-processed based on ADC data, allowing a user to quickly and
easily implement control loops or simulations of other hardware.
Figure 10 shows an arbitrary waveform generated using Python
and written to the DAC output. This example shows the generation
of a ±10 V peak-to-peak 5 kHz sine wave, but any waveform can
be implemented. For example, for an HIL setup one can generate a
damped sine wave, chirp, noise, or distorted waveform to simulate
defective hardware.
Figure 10. Example DAC Output Generation with Python
Figure 11 shows the measured input waveform for analysis, plotting
the sine wave generated in Figure 10. The samples read from
the ADCs can be processed and used as inputs to user-imple-
mented Python algorithms implementing control loops, hardware
emulations, or any other desired feedback systems.
Figure 11. ADC Samples Read and Plotted Using Python
MATLAB and Simulink
MATLAB® can also be used to interface with the CN0584 using
the High Speed Converter Toolbox, which enables largely the same
set of features as described for Python above. In addition to this,
Simulink® can be used to create custom HDL models which can
be loaded into the FPGA and run in real time using the CN0584.
Existing Simulink models or custom algorithms can be used to
implement control systems, perform digital signal processing (DSP)
operations on measured signals, or emulate hardware functions.
Figure 12 shows the placement of a Simulink model inserted in both
receive and transmit mode within the CN0584 block diagram. This
means that ADC samples are passed through the HDL model and
stored into memory and that DAC samples are passed through the
HDL model and output on the CN0584. HDL models could also be
inserted in receive-only or transmit-only modes, which gives access
exclusively to ADC inputs or DAC outputs, respectively.



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