ST6252CM6 datasheet(21/78 Pages) STMICROELECTRONICS

部品番号	ST6252CM6

部品情報	8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, SAFE RESET, AUTO-RELOAD TIMER AND EEPROM

PDF	78 Pages

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メーカー	STMICROELECTRONICS [STMicroelectronics]

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ST62T52C ST62T62C/E62C

CLOCK SYSTEM (Cont’d)

Figure 11. Clock Circuit Block Diagram

Figure 12. Maximum Operating Frequency (fMAX) versus Supply Voltage (VDD)

Notes:

1. In this area, operation is guaranteed at the

quartz crystal frequency.

2. When the OSG is disabled, operation in this

area is guaranteed at the crystal frequency. When

the OSG is enabled, operation in this area is guar-

anteed at a frequency of at least fOSG Min.

3. When the OSG is disabled, operation in this

area is guaranteed at the quartz crystal frequency.

When the OSG is enabled, access to this area is

prevented. The internal frequency is kept a fOSG.

4. When the OSG is disabled, operation in this

area is not guaranteed

When the OSG is enabled, access to this area is

prevented. The internal frequency is kept at fOSG.

MAIN

OSCILLATOR

OSG

LFAO

Core

:13

:12

TIMER 1

Watchdog

POR

fINT

Main Oscillator off

2.5

3.6

4.5

5.5

Maximum FREQU ENCY (MHz)

SUPPLY VOLTAGE (VDD)

fOSG

fOSG Min (at 85°C)

VR01807J

fOSG Min (at 125°C)

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