ST7261 datasheet(61/80 Pages) STMICROELECTRONICS

部品番号	ST7261

部品情報	LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS, ROM MEMORY, LVD, WDG, TIMER

PDF	80 Pages

Scroll/Zoom	100%

メーカー	STMICROELECTRONICS [STMicroelectronics]

ホームページ	http://www.st.com

Logo

61 / 80 page

ST7261

61/80

EMC CHARACTERISTICS (Cont’d)

True Open Drain Pin Protection

The centralized protection (4) is not involved in the

discharge of the ESD stresses applied to true

open drain pads due to the fact that a P-Buffer and

diode to VDD are not implemented. An additional

local protection between the pad and VSS (5a &

5b) is implemented to completely absorb the posi-

tive ESD discharge.

Multisupply Configuration

When several types of ground (VSS, VSSA, ...) and

power supply (VDD, VDDA, ...) are available for any

reason (better noise immunity...), the structure

shown in Figure 42 is implemented to protect the

device against ESD.

Figure 40. Positive Stress on a True Open Drain Pad vs. VSS

Figure 41. Negative Stress on a True Open Drain Pad vs. VDD

Figure 42. Multisupply Configuration

VDD

VSS

(1)

(2b)

(4)

OUT

VDD

VSS

(3b)

Main path

Path to avoid

(5a)

(5b)

VDD

VSS

(1)

(2b)

(4)

OUT

VDD

VSS

(3b)

Main path

(3b)

VDDA

VSSA

VDDA

VDD

VSS

BACK TO BACK DIODE

BETWEEN GROUNDS

VSSA

ST7261 データシート(PDF) 61 Page - STMicroelectronics

ST7261 データシート(HTML) 61 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

データシートダウンロード

リンク URL

ST7261 データシート(PDF) 61 Page - STMicroelectronics

ST7261 データシート(HTML) 61 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

データシート ダウンロード

リンク URL

データシートダウンロード