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ST7554 データシート(PDF) 6 Page - STMicroelectronics

部品番号 ST7554
部品情報  V.90 USB WORLD MODEM CONTROLLER
PDF  11 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7554 データシート(HTML) 6 Page - STMicroelectronics

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ELECTRICAL SPECIFICATIONS
Unless otherwise stated, electrical characteristics are specified over the operating range.
Typical values are given for VBUS = +5V, VREGA = 3.3V, VREGD = 3.3V, Tamb = 25°C.
Absolute Maximum Rating (AGND = DGND = USB GND = 0V, all voltages with respect to 0V)
Symbol
Parameter
Value
Unit
DVDD
Digital Power Supply
-0.3, 6.0
V
II
Input Current per Pin
-10, +10
mA
IO
Output Current per Pin
-20, +20
mA
VIA
Analog Input Voltage
-0.3, AVDD + 0.3
V
VID
Digital Input Voltage
-0.3, DVDD + 0.3
V
Toper
Operating Temperature
0, +70
°C
Tstg
Storage Temperature
-55, +150
°C
Ptot
Maximum Power Dissipation
200
mW
Warning : Operation beyond these limits may result in permanent damage to the device. Normal operation is not guaranted at these extremes.
Nominal DC Characteristics (Tamb = 0 to 70°C unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
POWER SUPPLY AND COMMON MODE VOLTAGE
VBUS
Supply Voltage
4
5
5.25
V
IVBUS
Supply Current
TBD
mA
IVBUSS
Supply Current in Suspend Mode (PSM = 1)
TBD
µA
VREGA
Analog regulated Output Power Supply (PSM =1)
Analog regulated Input Power Supply (PSM =0)
3.4-10%
3.3-10%
3.4
3.3
3.4+10%
3.3+10%
V
V
VREGD
Digital regulated Output Power Supply (PSM =1)
Digital regulated Input Power Supply (PSM =0)
3.4-10%
3.3-10%
3.4
3.3
3.4+10%
3.3+10%
V
V
IVREGA
Analog regulated Output Current (PSM =1)
Analog regulated Input Current (PSM =0)
TBD
40
mA
mA
IVREGD
Digital regulated Output Current (PSM =1)
Digital regulated Input Current (PSM =0)
20
20
mA
mA
PDLP
Low Power Mode (Suspend mode D2, wake-up on ring enabled)
TBD
mW
PD
Operating Power (SSI in power-down)
TBD
mW
PD
Operating Power (D0 power state)
TBD
mW
DIGITAL INTERFACE (except XTALIN, XTALOUT, PSM and RESET) (these inputs have hysteresis)
VIH
VIL
High Level Input Voltage
Low Level Input Voltage
0.8 x VREGD
0.2 x VREGD
V
V
VOH
VOL
High Level Output Voltage
Low Level Output Voltage
0.85 x VREGD
0.4
V
V
ILEAK
Input Leakage Current
± 1
µA
IOL
IOH
High Level Output Current (0 < VOL < VOLMax.)
Low Level Output Current (VOHMin. < VOH < VREGD)-2
2mA
mA
VHYST
Schmitt Trigger Hysteresis
0.8
V
CIN
Input Capacitance
3
pF
PSM, RESET (these inputs have hysteresis)
VIH
VIL
High Level Input Voltage
Low Level Input Voltage
0.7 x VBUS
0.3 x VBUS
V
V
ILEAK
Input Leakage Current
± 1
µA
VHYST
Schmitt Trigger Hysteresis
1
1.3
V
CRYSTAL OSCILLATOR (XTALIN, XTALOUT)
VIH
VIL
High Level Input Voltage
Low Level Input Voltage
0.8 x VREGA
0.2 x VREGA
V
V
IIH
IIL
High Level Input Current
Low Level Input Current
-20
20
µA
µA
ST7554
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