ST90R40C6 datasheet(21/56 Pages) STMICROELECTRONICS

部品番号	ST90R40C6

部品情報	16K ROM HCMOS MCU WITH EEPROM, RAM AND A/D CONVERTER

PDF	56 Pages

Scroll/Zoom	100%

メーカー	STMICROELECTRONICS [STMicroelectronics]

ホームページ	http://www.st.com

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21 / 56 page

Symbol

Parameter

Value (Note)

Unit

OSCIN Divided

By 2

OSCIN Not Divided

By 2

Min. Max.

TdBR (BACK)

BREQ

↓ to BUSACK ↓

TpC+8

TwCL+12

TpC(6P+2W+7)+65

TpC(3P+W+3)+TwCL+65

360

TdBR (BACK)

BREQ

↑ to BUSACK ↑

3TpC+60

TpC+TwCL+60

185

TdBACK (BREL)

BUSACK

↓ toBus

Release

TdBACK (BACT)

BUSACK

↑ to Bus

Active

Note: The value left hand two columns show the formula used to calculate the timing minimum or maximum from the oscillator clock period,

prescale value and number of wait cycles inserted.

The value right hand two columns show the timing minimum and maximum for an external clock at 24MHz divided by 2, prescale value of zero

and zero wait status.

BUS REQUEST/ACKNOWLEDGE TIMING TABLE (VDD =5V

± 10%,TA =–40°Cto +85°C, Cload = 50pF,

INTCLK = 12MHz, Push-pull output configuration, unless otherwise specified)

Note : MEMINT = Group of memory interface signals: AS, DS, R/W, P00-P07, P10-P17

BUS REQUEST/ACKNOWLEDGE TIMING

ST9040

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