EM7640FS16AW45LL datasheet(8/11 Pages) EMLSI

部品番号	EM7640FS16AW45LL

部品情報	128K x16 bit Super Low Power and Low Voltage Full CMOS Static RAM

PDF	11 Pages

Scroll/Zoom	100%

メーカー	EMLSI [Emerging Memory & Logic Solutions Inc]

ホームページ	http://www.emlsi.com

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8 / 11 page

EM620FU16 Series

Low Power, 128Kx16 SRAM

merging Memory & Logic Solutions Inc.

tWC

Address

CS1

CS2

UB ,LB

Data in

Data out

CW(2)

tWR(4)

tAW

tBW

WP(1)

TIMING WAVEFORM OF WRITE CYCLE(3) (UB, LB CONTROLLED)

High-Z

Data Valid

tAS(3)

NOTES (WRITE CYCLE)

1. A write occurs during the overlap(tWP) of low CS1 and low WE. A write begins when CS1 goes low and WE

goes low with asserting UB or LB for single byte operation or simultaneously asserting UB and LB for double

byte operation. A write ends at the earliest transition when CS1 goes high and WE goes high. The tWP is

measured from the beginning of write to the end of write.

2. tCW is measured from the CS1 going low to end of write.

3. tAS is measured from the address valid to the beginning of write.

4. tWR is measured from the end or write to the address change. tWR applied in case a write ends as CS1

or WE going high.

EM7640FS16AW45LL データシート(PDF) 8 Page - Emerging Memory & Logic Solutions Inc