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ST92F120JR9T データシート(PDF) 298 Page - STMicroelectronics

部品番号 ST92F120JR9T
部品情報  8/16-BIT FLASH MCU FAMILY WITH RAM, EEPROM AND J1850 BLPD
PDF  320 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST92F120JR9T データシート(HTML) 298 Page - STMicroelectronics

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ST92F120 - ELECTRICAL CHARACTERISTICS
WAKE-UP MANAGEMENT TIMING TABLE
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, , unless otherwise specified)
Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period.
The value in the right hand two columns show the timing minimum and maximum for an internal clock at 24MHz (INTCLK).
The given data are related to Wake-up Management Unit used in External Interrupt mode.
Measurement points are VIH for positive pulses and VIL for negative pulses.
(1) Formula guaranteed by design.
Legend:
Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;
2 x OSCIN period when OSCIN is divided by 2;
OSCIN period x PLL factor when the PLL is enabled.
WAKE-UP MANAGEMENT TIMING
N
°
Symbol
Parameter
Value
Unit
Formula(1)
Min
1
TwWKPLR
Low Level Minimum Pulse Width in Rising Edge
Mode
≥Tck+10
≥ 50
ns
2
TwWKPHR
High Level Minimum Pulse Width in Rising Edge
Mode
≥Tck+10
≥ 50
ns
3
TwWKPHF
High Level Minimum Pulse Width in Falling Edge
Mode
≥Tck+10
50
ns
4
TwWKPLF
Low Level Minimum Pulse Width in Falling Edge
Mode
≥Tck+10
50
ns
WKU Pn
n=0
15
1



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