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ST92F120JR9T データシート(PDF) 299 Page - STMicroelectronics

部品番号 ST92F120JR9T
部品情報  8/16-BIT FLASH MCU FAMILY WITH RAM, EEPROM AND J1850 BLPD
PDF  320 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST92F120JR9T データシート(HTML) 299 Page - STMicroelectronics

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ST92F120 - ELECTRICAL CHARACTERISTICS
RCCU CHARACTERISTICS
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
Note:
(1) Unless otherwise stated, typical data are based on TA=25°C and VDD= 5V. They are only reported for design guide lines not tested in
production.
RCCU TIMING TABLE
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
Note:
(1) Unless otherwise stated, typical data are based on TA=25°C and VDD= 5V. They are only reported for design guide lines not tested in
production.
(2) Depending on the delay between rising edge of RESET pin and the first rising edge of CLOCK1, the value can differ from the typical value
for +/- 1 CLOCK1 cycle.
Legend:Tosc = OSCIN clock periods.
PLL CHARACTERISTICS
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
Note:
(1) Unless otherwise stated, typical data are based on TA=25°C and VDD= 5V. They are only reported for design guide lines not tested in
production.
(2) Measured at 24MHz (INTCLK). Guaranteed by Design Characterisation (not tested).
Legend: Tosc = OSCIN clock periods.
Symbol
Parameter
Comment
Value
Unit
Min
Typ (1)
Max
VIHRS
RESET Input High Level
Input Threshold
3.2
V
Input Voltage Range
VDD + 0.3
V
VILRS
RESET Input Low Level
Input Threshold
2.4
V
Input Voltage Range
– 0.3
VHYRS
RESET Input Hysteresis
800
mV
ILKRS
RESET Pin Input Leakage
0V < VIN <VDD
–1
+ 1
µA
Symbol
Parameter
Comment
Value
Unit
Min
Typ (1)
Max
TFRS
RESET Input Filtered Pulse
50
ns
TNFR
RESET Input Non Filtered
Pulse
20
µs
TRSPH
(2)
RESET Phase duration
20400 x Tosc
µs
TSTR
STOP Restart duration
DIV2 = 0
DIV2 = 1
10200 x Tosc
20400 x Tosc
µs
Symbol
Parameter
Comment
Value
Unit
Min
Typ (1)
Max
FXTL
Crystal Reference Frequency
2
5
MHz
FVCO
VCO Operating Frequency
6
24
MHz
TPLK
Lock-in Time
350 x Tosc
1000 x Tosc
µs
PLL Jitter
0
1200 (2)
ps
1



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