C167CS-L datasheet(79/81 Pages) INFINEON

部品番号	C167CS-L

部品情報	16-Bit Single-Chip Microcontroller

PDF	81 Pages

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メーカー	INFINEON [Infineon Technologies AG]

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C167CS-4R

C167CS-L

Data Sheet

V2.2, 2001-08

External XRAM Access

If XPER-Share mode is enabled the on-chip XRAM of the C167CS can be accessed

(during hold states) by an external master like an asynchronous SRAM.

Figure 24

External Access to the XRAM

Table 21

XRAM Access Timing (Operating Conditions apply)

Parameter

Symbol

Limit Values

Unit

min.

max.

Address setup time before RD/WR falling edge

t40 SR 4

–

Address hold time after RD/WR rising edge

t41 SR 0

–

Data turn on delay after RD falling edge

t42 CC 2

–

Data output valid delay after address latched

t43 CC –

Data turn off delay after RD rising edge

t44 CC 0

Write data setup time before WR rising edge

t45 SR 10

–

Write data hold time after WR rising edge

t46 SR 1

–

WR pulse width

t47 SR 18

–

WR signal recovery time

t48 SR t40

–

Read Data

MCT04423

(RD, WR)

Write Data

Command

Address

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