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STL30NF3LL データシート(PDF) 1 Page - STMicroelectronics |
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STL30NF3LL データシート(HTML) 1 Page - STMicroelectronics |
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1 / 6 page ![]() 1/6 PRELIMINARY DATA November 2001 STL30NF3LL N-CHANNEL 30V - 0.008 Ω - 30A PowerFLAT™ LOW GATE CHARGE STripFET™ MOSFET s TYPICAL RDS(on) = 0.008Ω s IMPROVED DIE-TO-FOOTPRINT RATIO s VERY LOW PROFILE PACKAGE DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique “STripFET™” technolo- gy. The resulting transistor shows extremely low on- resistance and minimal gate charge. The new Pow- erFLAT™ package allows a significant reduction in board space without compromising performance. APPLICATIONS s DC-DC CONVERTERS s BATTERY MANAGEMENT IN NOMADIC EQUIPMENT ABSOLUTE MAXIMUM RATINGS (q) Pulse width limited by safe operating area (#) Limited by Wire Bonding TYPE VDSS RDS(on) ID STL30NF3LL 30 V < 0.010 Ω 30 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 30 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 30 V VGS Gate- source Voltage ± 16 V ID(#) Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C 30 19 A A IDM (l) Drain Current (pulsed) 120 A PTOT Total Dissipation at TC = 25°C 80 W Derating Factor 0.64 W/°C Tstg Storage Temperature – 55 to 150 °C Tj Max. Operating Junction Temperature PowerFLAT™(6x5) (Chip Scale Package) INTERNAL SCHEMATIC DIAGRAM |
同様の部品番号 - STL30NF3LL |
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同様の説明 - STL30NF3LL |
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