STLC5432 datasheet(3/46 Pages) STMICROELECTRONICS

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PIN DESCRIPTION (continued)

Name

Type

Function

LCLK

Local Clock : this clock input determines the data shift rate on the two digital

multiplexes. This clock frequency can be indifferently 2048, 4096, 8192 or 16384kHz.

Data Out and Data In rate is always 2048 kbit/s when Serial Interface microprocessor:

an internal automatic mechanism divides by two the frequency if 4096 kHz.

LFSR

Local Frame Synchronization for the Receiver. This clock input defines the start of the

frame on the digital multiplex Data (pin DOUT). This clock frequency can be

indifferently 8 kHz or a submultiple of 8 kHz.

LFSX

Local Frame Synchronization for the Transmitter. This clock input defines the start of

the frame on the digital multiplex Data (pin DIN). This clock frequency can be

indifferently 8 kHz or a submultiple of 8 kHz.

If submultiple of 8 kHz, LFSX defines the start of even frame on DIN. The TSO of this

even frame will contain the Frame Alignment Signal (FAS) on the line.

AL0,

AL1

Alarm 0 Output, alarm 1 Output. These pins are open drain outputs which are

normally in high impedance state.

AL1

AL0

Alarm definitions

Frame or Multiframe recovered,

A bit received is 0.

0Volt

Frame or Multiframe recovered,

A bit received is 1

0Volt

Frame and Multiframe lost, AIS

Alarm Indication Signal is detected.

0Volt

Frame and Multiframe lost, AIS

Alarm Indication Signal is not detected.

DPI

DPI input: The internal DPLL is synchronized either by the signal applied on DPI input

(if DPIS bit of CR5 register is = 0) or by the 2MHz clock recovered from the line.

SA/RESET

Stand Alone : When this pin is connected to 5 Volts, the device works without

microprocessor. The configuration is given by the values per default of programmable

registers. BRDI and BXDI must not be used.

RESET: When this pin is put to 5 Volts during 100 ns at least every programmable

microprocessor is selected by P0, P1 pins.

P0, P1

39, 43

Processor interface. These two input pins define the microprocessor interface

chosen.

Microprocessor Interface

-----------------------------------------------------------------------------------

Serial Microprocessor Interface

ST9 Microprocessor Interface

Multiplexed Motorola processor interface

Multiplexed Intel processor interface

AS/ALE

Address Strobe/Address Latch Enable. Input

Chip Select. A high level on this input selects the PRCD for a read write operation.

R/W/WR

Read/Write/Write Data. Input.

DS/RD

Data Strobe/Read Data. Input.

A/D0 to A/D7

4 to 7;

27 to 30

I/O

Address/Data 0 to 7. Input-Output.

INT

Interrupt Request. The signal is activated low when the PRCD requests an interrupt. It

is an open drain output.

STLC5432

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