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STM1810 データシート(PDF) 20 Page - STMicroelectronics |
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STM1810 データシート(HTML) 20 Page - STMicroelectronics |
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20 / 25 page ![]() Package mechanical STM1810/1811/1812/1813/1815/1816/1817/1818 20/25 6 Package mechanical In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 22. SOT23-3 – 3-lead small outline transistor package outline 1. Drawing is not to scale. SOT23-3 0.10 C A A2 A1 3X C C L1 θ L C e1 D e 3X b E M 0.15 CA B B E1 A M 0.20 C A B 1 |
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