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74V1T86 データシート(PDF) 1 Page - STMicroelectronics |
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74V1T86 データシート(HTML) 1 Page - STMicroelectronics |
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1 / 9 page ![]() 1/9 April 2004 s HIGH SPEED: tPD = 4.8ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA=25°C s COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN), VIL =0.8V (MAX) s POWER DOWN PROTECTION ON INPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|= IOL =8mA (MIN) at VCC =4.5V s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V1T86 is an advanced high-speed CMOS SINGLE EXCLUSIVE OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. 74V1T86 SINGLE EXCLUSIVE OR GATE PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE T & R SOT23-5L 74V1T86STR SOT323-5L 74V1T86CTR SOT323-5L SOT23-5L |
同様の部品番号 - 74V1T86 |
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同様の説明 - 74V1T86 |
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