EMIF04-MMC02F2

Ordering information scheme

5/8

3

Ordering information scheme

Figure 10.

Ordering information scheme

4

Package information

packages. These packages have a lead-free second level interconnect. The category of

second level interconnect is marked on the inner box label, in compliance with JEDEC

Standard JESD97. The maximum ratings related to soldering conditions are also marked on

the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at

www.st.com.

Figure 11.

Flip Chip dimensions

EMIF

yy

-

xxx zz

Fx

EMI Filter

Number of lines

Information

Package

x = resistance value (Ohms)

z = capacitance value / 10(pF)

or

3 letters = application

2 digits = version

F = Flip Chip

x = 2: Lead-free, pitch = 500 µm, bump = 315 µm

1.57mm ± 50 µm

315 µm ± 50

500 µm ± 50

650 µm ± 65

285 µm