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M54HC74K データシート(PDF) 5 Page - STMicroelectronics

部品番号 M54HC74K
部品情報  RAD HARD DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
PDF  12 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M54HC74K データシート(HTML) 5 Page - STMicroelectronics

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Table 6: AC Electrical Characteristics (CL = 50 pF, Input tr =tf = 6ns)
Table 7: Capacitive Characteristics
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) =CPD xVCC xfIN +ICC/2 (per FLIP/
FLOP)
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
tTLH tTHL Output Transition
Time
2.0
30
75
95
110
ns
4.5
8
15
19
22
6.0
7
13
16
19
tPLH tPHL Propagation Delay
Time (CK - Q, Q)
2.0
48
150
190
225
ns
4.5
16
30
38
45
6.0
13
26
32
38
tPLH tPHL Propagation Delay
Time (CLR,PR -
Q, Q)
2.0
51
150
190
225
ns
4.5
17
30
38
45
6.0
15
26
32
38
fMAX
Maximum Clock
Frequency
2.0
6.2
21
5
4.2
MHz
4.5
31
632521
6.0
37
673025
tW(H)
tW(L)
Minimum Pulse
Width (CK)
2.0
18
75
95
110
ns
4.5
6
15
19
22
6.0
6
13
16
19
tW(L)
Minimum Pulse
Width (CLR,PR)
2.0
21
75
95
110
ns
4.5
7
15
19
22
6.0
6
13
16
19
ts
Minimum Set-up
Time
2.0
15
75
95
110
ns
4.5
4
15
19
22
6.0
3
13
16
19
th
Minimum Hold
Time
2.0
0
0
0
ns
4.5
0
0
0
6.0
0
0
0
tREM
Minimum Removal
Time (CLR,PR to
CK)
2.0
0
25
30
35
ns
4.5
0
5
6
7
6.0
0
4
5
6
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
CIN
Input Capacitance
5.0
5
10
10
10
pF
CPD
Power Dissipation
Capacitance (note
1)
5.0
34
pF



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