STV82X7 datasheet(64/156 Pages) STMICROELECTRONICS

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STV82x7

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I2S_SYNC_OFFSET

I²S Synchronization Offset Frequency Register

12.3

Clocking 1

A low-jitter PLL Clock is integrated and can be fully reprogrammed using the registers described

below. By default, the programming is defined for a 27-MHz quartz crystal frequency, which is the

frequency recommended for reducing potential RF interference in the application. However, if

necessary, the PLL Clock can be re-programmed for other quartz crystal frequencies within a range

from 23 to 30 MHz. Other quartz crystal frequencies can be programmed on your demand.

Note:

A Crystal Frequency change is compatible with other default I²C programming including the built-in

Automatic Standard Recognition System.

SYS_CONFIG

System Configuration Control Register

Address: 06h

Type: R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

I2S_SFO[7:0]

Bit Name

Reset

Function

I2S_SFO[7:0]

0000

I²S synchronization frequency offset (±450 ppm full scale)

Address: 07h

Type: R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

I2S_CH_NB[1:0]

INPUT_FREQ[3:0]

INPUT_CONFIG[1:0]

Bit Name

Reset

Function

I2S_CH_NB[1:0]

Number of I2S channels input

00: N/A

01: 2 channels

10: 4 channels

11: 6 channels

INPUT_FREQ[3:0]

0000

I2S Input frequency

0000 : 32 kHz

0001: 44.1 kHz

0010: 48 kHz

0011: 8 kHz (I2S input, 2 channels only)

0100 : 11.025 kHz (I2S input, 2 channels only)

0101 : 12 kHz (I2S input, 2 channels only)

0110 : 16 kHz (I2S input, 2 channels only)

0111 : 22.05 kHz (I2S input, 2 channels only)

1000 : 24 kHz (I2S input, 2 channels only)

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