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M41ST87Y データシート(PDF) 23 Page - STMicroelectronics |
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M41ST87Y データシート(HTML) 23 Page - STMicroelectronics |
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23 / 48 page ![]() M41ST87Y, M41ST87W Operating modes 23/48 Figure 17. Tamper current options Figure 18. Tamper output timing (with CLR1EXT or CLR2EXT = '1') 1. If connected to a negative charge pump device, this pin must be isolated from the charge pump by using both n-channel and p-channel MOSFETs as illustrated in Figure 19 on page 24. 2. If the device is in battery back-up; NOT on VCC (see Section 2.6.9: RAM clear external (CLR1EXT and CLR2EXT) on page 21). 3. If TIEX = '1.' 4. If ABE = '1.' AI07820 TAMPER LO, NORMALLY OPEN TAMPER HI, NORMALLY CLOSED User Configuration User Configuration User Configuration TDS X = 0 TDS X = 1 TDS X = 0 TDS X = 1 TAMPER HI, NORMALLY OPEN TAMPER LO, NORMALLY CLOSED CONTINUOUS MONITORING CONTINUOUS MONITORING CONTINUOUS MONITORING SAMPLED MONITORING CONTINUOUS MONITORING SAMPLED MONITORING VCC (VOUT) TPX (TP1, TP2) VCC (VOUT) VCC (VOUT) TCM X, TPMX TCHI/TCLO = 0 TCHI/TCLO = 1 1M Ω 10M Ω TCHI/TCLO = 0 TCHI/TCLO = 1 1M Ω 10M Ω TPCLR VOUT (1) RST Tamper Event (TB Bit set) High-Z(2) trec tCLR tCLRD AI07083 ECON IRQ/OUT (3) High-Z (4) |
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