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M41ST87WMX6TR データシート(PDF) 13 Page - STMicroelectronics

部品番号 M41ST87WMX6TR
部品情報  5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
PDF  48 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M41ST87WMX6TR データシート(HTML) 13 Page - STMicroelectronics

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M41ST87Y, M41ST87W
Operating modes
13/48
case the transmitter must leave the data line high to enable the master to generate the
STOP condition.
Figure 5.
Serial bus data transfer sequence
Figure 6.
Acknowledgement sequence
Figure 7.
Bus timing requirements sequence
AI00587
DATA
CLOCK
DATA LINE
STABLE
DATA VALID
START
CONDITION
CHANGE OF
DATA ALLOWED
STOP
CONDITION
AI00601
DATA OUTPUT
BY RECEIVER
DATA OUTPUT
BY TRANSMITTER
SCL FROM
MASTER
START
CLOCK PULSE FOR
ACKNOWLEDGEMENT
12
89
MSB
LSB
AI00589
SDA
P
tSU:STO
tSU:STA
tHD:STA
SR
SCL
tSU:DAT
tF
tHD:DAT
tR
tHIGH
tLOW
tHD:STA
tBUF
S
P



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