M62376GP

REJ03D0881-0300 Rev.3.00 Mar 25, 2008

Page 2 of 10

Pin Arrangement

24

21

22

23

1

4

3

2

20

5

19

6

18

7

17

8

16

9

15

10

A1

D6/A10

GND

D3

A2

RESET

A3

EN

A4

SO

D11/A5

SI

D10/A6

CLK

D9/A7

D0

D8/A8

D1

D7/A9

D2

14

11

13

12

D4/A12

D5/A11

M62376GP

(Top view)

Outline: PLSP0024JA-A (24P2E-A)

Pin Description

Pin No.

Pin Name

Function

20

SI

Serial data input pin. Enters serial data of 16-bit in length.

21

SO

Outputs data from 16-bit shift register that reads serial data or parallel data.

19

CLK

Shift clock input pin. At the rise of shift clock, input signal from the SI pin is entered into

the 16-bit shift register.

22

EN

Entry of low level into the

EN pin starts to read data. Putting 16-bit data at high level after

input loads the input data to a specified register.

1

A1

2

A2

3

A3

4

A4

Special output pin for 8-bit D/A converter (DAC)

5

D11/A5

6

D10/A6

7

D9/A7

8

D8/A8

9

D7/A9

10

D6/A10

11

D5/A11

12

D4/A12

Pin that shares I/O and DAC output. Settings can be selected with serial data. D4 to D11

18

D0

17

D1

16

D2

15

D3

Digital input output pin.

14

Digital block power supply pin.

24

GND

GND pin

13

Power supply pin in analog block and reference voltage input pin on the upper side of D/A

converter

23

RESET

RESET pin