| データシートサーチシステム |
|
HD151TS201ATEL データシート(PDF) 21 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD151TS201ATEL データシート(HTML) 21 Page - Renesas Technology Corp |
|
21 / 29 page ![]() HD151TS201AT Rev.1.00, Oct.21.2003, page 21 of 28 DC Electrical Characteristics CPUT/C Clock Ta = 0°C to 85°C Item Symbol Min Typ * 1 Max Unit Test Conditions Output voltage VO 0.695 1.2 V Rp = 49.9, VDD = 3.3 V Output Current IO I(nom) mA VDD = 3.3 V * 2 Output resistance 3000 Ω VO = 1.2 V Note: 1. For conditions shown as Min or Max, use the appropriate value specified under recommended operating conditions 2 I(nom) is output current(Ioh) shown in Page5 Table3. AC Electrical Characteristics CPUT/C Clock (CPU at 0.7V Timing) Ta = 0°C to 85°C, VDD = 3.3 V, CL = 2 pF, Rs = 33.2 Ω, Rp = 49.9 Ω Item Symbol Min Typ Max Unit Test Conditions Cycle to cycle jitter* 1 tCCS |150| ps CPU Group Skew (CPU clock out to CPU clock out) tskS |100| ps Rise time tr 175 700 ps VO = 0.175 V to 0.525 V Fall time tf 175 700 ps VO = 0.175 V to 0.525 V Clock Duty Cycle 45 50 55 % CPU clock period (66) 15.075 ns CPU clock period (100) 10.25 ns CPU clock period (133) 7.5 ns CPU clock period (200) 4.975 ns Note: 1.Difference of cycle time between two adjoining cycles. |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |