HD74AC373/HD74ACT373

Rev.2.00, Jul.16.2004, page 3 of 9

Truth Table

Inputs

Outputs

OE

OE

OE

OE

LE

D

n

O

n

HX

X

Z

LH

L

L

LH

H

H

LLX

O

0

H :

High Voltage Level

L

:

Low Voltage Level

Z

:

High Impedance

X :

Immaterial

O

Previous O

Functional Description

The HD74AC373/HD74ACT373 contains eight D-type latches with 3-state standard outputs. When the Latch Enable

(LE) input is High, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch

output will change state each time its D input changes. When LE is Low, the latches store the information that was

present on the D inputs setup time proceding the High-to-Low transition of LE. The 3-state standard outputs are

controlled by the Output Enable (

OE) input. When OE is Low, the standard outputs are in the 2-state mode. When OE

is High, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the

latches.

Logic Diagram

G

O

D

G

O

D

G

O

D

G

O

D

G

O

D

G

O

D

G

O

D

G

O

D

LE

OE

Please note that this diagram is provided only for the understanding of logic operations and should not be

used to estimate propagation delays.

Absolute Maximum Ratings

Item

Symbol

Ratings

Unit

Condition

Supply voltage

V

CC

–0.5 to 7

V

–20

mA

V

DC input diode current

I

IK

20

mA

V

DC input voltage

V

I

–0.5 to Vcc+0.5

V

–50

mA

V

DC output diode current

I

OK

50

mA

V

DC output voltage

V

O

–0.5 to Vcc+0.5

V

DC output source or sink current

I

O

±50

mA

DC V

I

±50

mA

Storage temperature

Tstg

–65 to +150

°C