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M32C/8B データシート(PDF) 134 Page - Renesas Technology Corp |
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M32C/8B データシート(HTML) 134 Page - Renesas Technology Corp |
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134 / 406 page ![]() Under development M32C/8B Group 12. Watchdog Timer Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 117 of 385 Figure 12.1 Watchdog Timer Block Diagram 1/16 Prescaler CM07=0 WDC7=0 CM06, CM07: bits in the CM0 register WDC7: bit in the WDC register PM22: bit in the PM2 register Watchdog timer interrupt signal 0 CM07=0 WDC7=1 CM07=1 Set to 7FFFh Watchdog timer On-chip oscillator clock Write signal to the WDTS register Internal reset signal 1/128 1/2 Reset CPU clock HOLD PM22 1 CM06 0 1 Voltage monitor interrupt signal Oscillation stop detection interrupt signal Watchdog timer interrupt request (non-maskable) Wait mode signal |
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