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H8SX1663 データシート(PDF) 377 Page - Renesas Technology Corp

部品番号 H8SX1663
部品情報  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 データシート(HTML) 377 Page - Renesas Technology Corp

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Section 7 DMA Controller (DMAC)
Rev.1.00 Jun. 07, 2006 Page 325 of 1102
REJ09B0294-0100
7.3.4
DMA Transfer Count Register (DTCR)
DTCR is a 32-bit readable/writable register that specifies the size of data to be transferred (total
transfer size).
To transfer 1-byte data in total, set H'00000001 in DTCR. When H'00000000 is set in this register,
it means that the total transfer size is not specified and data is transferred with the transfer counter
stopped (free running mode). When H'FFFFFFFF is set, the total transfer size is 4 Gbytes
(4,294,967,295), which is the maximum size. While data is being transferred, this register
indicates the remaining transfer size. The value corresponding to its data access size is subtracted
every time data is transferred (byte:
−1, word: −2, and longword: −4).
Although DTCR can always be read from by the CPU, it must be read from in longwords and
must not be written to while data for the channel is being transferred.
31
0
R/W
30
0
R/W
29
0
R/W
28
0
R/W
27
0
R/W
24
0
R/W
26
0
R/W
25
0
R/W
Bit
Bit Name
Initial Value
R/W
23
0
R/W
22
0
R/W
21
0
R/W
20
0
R/W
19
0
R/W
16
0
R/W
18
0
R/W
17
0
R/W
Bit
Bit Name
Initial Value
R/W
15
0
R/W
14
0
R/W
13
0
R/W
12
0
R/W
11
0
R/W
8
0
R/W
10
0
R/W
9
0
R/W
Bit
Bit Name
Initial Value
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
0
0
R/W
2
0
R/W
1
0
R/W
Bit
Bit Name
Initial Value
R/W



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