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3886 データシート(PDF) 91 Page - Renesas Technology Corp |
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3886 データシート(HTML) 91 Page - Renesas Technology Corp |
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91 / 380 page  HARDWARE 1-66 3886 Group User’s Manual BUS CONTROL AT MEMORY EXPANSION The M38867M8A/E8A have a built-in ONW function to facilitate access to an external (expanded) memory and I/O devices in memory expansion mode or microprocessor mode. If an “L” level signal is input to the P32/ONW pin when the CPU is in a read or write state, the corresponding read or write cycle is extended by one cycle of φ. During this extended term, the RD and WR signals remain at “L.” This extension function is valid only for writing to and reading from addresses 000016 to 000716 and 044016 to FFFF16, and only read and write cycles are extended. Fig. 66 ONW function timing FUNCTIONAL DESCRIPTION φ RD WR ONW * ** * Term where ONW input signal is received. During this term, the ONW signal must be fixed at either “H” or “L”. At all other times, the input level of the ONW signal has no affect on operations. The bus cycles is not extended for an address in the area 000816 to 043F16, because the ONW signal is not received. Read cycle Write cycle Dummy cycle Write cycle Read cycleDummy cycle AD15—AD0 |
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