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TDA9109 データシート(PDF) 18 Page - STMicroelectronics

部品番号 TDA9109
部品情報  LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
PDF  30 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TDA9109 データシート(HTML) 18 Page - STMicroelectronics

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6
7
PLL1F
(Loop Filter)
R0
1.6V
6.4V
5
C0
6.4V
1.6V
0 0.875T
H TH
RS
FLIP FLOP
(1.3V < V
< 6V)
7
I0
2
4I0
I
0
Figure 9 : Details of VCO
LOCKDET
COMP1
INPUT
INTERFACE
H/HVIN
High
CHARGE
PUMP
Low
PLL
INHIBITION
VCO
76
5
PLL1F
R0
C0
PHASE
ADJUST
E2
I2C
HPOS
Adj.
OSC
Tramext
Tramext
I2C
Forced
Frequency
Lock/Unlock
Status
8
HPOSITION
1
Figure 8 : Block Diagram
OPERATING DESCRIPTION (continued)
7
PLL1F
1
µF
4.7
µF
1.8k
Ω
Figure 7
The PLL1 is internally inhibited during extracted ver-
tical sync (if any) to avoid taking in account missing
pulses or wrong pulses on phase comparator.
The inhibition is done by a switch located between
the charge pump and the filter (see Figure 8).
The VCO uses an external RC network. It delivers
a linear sawtooth obtained by the charge and the
discharge of the capacitor, with a current propor-
tional to the current in the resistor. The typical
thresholds of the sawtooth are 1.6V and 6.4V.
The control voltage of the VCO is between 1.33V
and 6V (see Figure 9). The theorical frequency
range of this VCO is in the ratio of 1 to 4.5. The
effective frequency range ha s to be smaller
(1 to 4.2) due to clamp intervention on the filter
lowest value.
TDA9109/SN
18/30



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