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TS4851 データシート(PDF) 23 Page - STMicroelectronics |
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TS4851 データシート(HTML) 23 Page - STMicroelectronics |
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23 / 28 page ![]() Application Information TS4851 23/28 5.6 Pop and Click performance The TS4851 has internal Pop and Click reduction circuitry. The performance of this circuitry is closely linked with the value of the input capacitor Cin and the bias voltage bypass capacitor Cb. The value of Cin is due to the lower cut-off frequency value requested. The value of Cb is due to THD+N and PSRR requested always in lower frequency. The TS4851 is optimized to have a low pop and click in the typical schematic configuration (see page 2). Note: The value of Cs is not an important consideration as regards pop and click. 5.7 Notes on PSRR measurement What is the PSRR? The PSRR is the Power Supply Rejection Ratio. The PSRR of a device, is the ratio between a power supply disturbance and the result on the output. We can say that the PSRR is the ability of a device to minimize the impact of power supply disturbances to the output. How we measure the PSRR? The PSSR was measured according to the schematic shown in Figure 61. Figure 61: PSRR measurement schematic Principles of operation • The DC voltage supply (Vcc) is fixed. • The AC sinusoidal ripple voltage (Vripple) is fixed. • No bypass capacitor Cs is used. The PSRR value for each frequency is: RMS is a rms selective measurement. 5.8 Power-On Reset When Power is applied to Vdd, an internal Power On Reset holds the TS4851 in a reset state until the Supply Voltage reached its nominal value. The Power On reset has a typical threshold at 1.8V. ) dB ( RMS RMS Log 20 PSRR ) Vripple ( ) Output ( ⎥ ⎥ ⎦ ⎤ ⎢ ⎢ ⎣ ⎡ × = |
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