SPC5702BECLU datasheet(9/98 Pages) FREESCALE

9 / 98 page

Pinout and Signal Descriptions

MPC560xS Microcontroller Data Sheet Data Sheet, Rev. 1

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

Pinout and Signal Descriptions

Mode entry module (MEM)

Provides a mechanism for controlling the device operational mode

and mode transition sequences in all functional states; also manages

the power control unit, reset generation module and clock generation

module, and holds the configuration, control and status registers

accessible for applications

Nexus development interface (NDI) level

Provides real-time development support capabilities in compliance

with the IEEE-ISTO 5001-2003 standard

Peripheral interrupt timer (PIT)

Produces periodic interrupts and triggers

Power control unit (PCU)

Reduces the overall power consumption by disconnecting parts of the

device from the power supply via a power switching device; device

components are grouped into sections called “power domains” which

are controlled by the PCU

Static random-access memory (SRAM)

Provides storage for program code, constants, and variables

Reset generation module (RGM)

Centralizes reset sources and manages the device reset sequence of

the device

Real time counter (RTC)

A free running counter used for time keeping applications, the RTC

can be configured to generate an interrupt at a pre-defined interval

independent of the mode of operation (run mode or low-power mode)

Sound generation logic (SGL)

Provides monotonic and polyphonic sound generation capability

Stepper motor controller (SMC)

A PWM motor controller suitable for driving instruments in a cluster

configuration or any other loads requiring a PWM signal

Stepper stall detect (SDD)

The SSD module connects to one stepper (SM) motor with 2 coils and

is used to monitor the movement of the SM to detect that the attached

gauge pointer has reached the stall position of the scale

System integration unit (SIU)

Provides control over all the electrical pad controls and up 32 ports

with 16 bits of bidirectional, general-purpose input and output signals

and supports up to 32 external interrupts with trigger event

configuration

System status configuration module (SSCM) Provides system configuration and status data, e.g., memory size and

status, device mode and security status, DMA status, etc., device

identification data, debug status port enable and selection, and bus

and peripheral abort enable/disable

System timer (STM)

Provides a set of output compare events to support AutoSAR and

operating system tasks

System watchdog timer (SWT)

Provides protection from runaway code

Test control unit (TCU)

An extension of the JTAG controller module, the TCU provides the

means to test chip functionality and connectivity while remaining

transparent to system logic when not in test mode

Table 2. MPC5606S Series Block Summary (continued)

Block

Function

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