INA159-EP datasheet(4/18 Pages) TI

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ELECTRICAL CHARACTERISTICS

INA159-EP

SBOS443 – NOVEMBER 2008 .......................................................................................................................................................................................... www.ti.com

Boldface limits apply over the specified temperature range, TA = –55°C to +125°C.

At TA = +25°C, RL = 10 kΩ connected to VS/2, REF pin 1 connected to ground, and REF pin 2 connected to VREF = 5 V,

unless otherwise noted.

INA159

PARAMETER

CONDITIONS

UNIT

MIN

TYP

MAX

OFFSET VOLTAGE(1)

RTO

VS = ±2.5 V, Reference and Input

Initial(1)

VOS

±100

±500

µV

Pins Grounded

Over Temperature

±1450

µV

vs Power Supply

PSRR VS = ±0.9 V to ±2.75 V

±20

±100

µV/V

Over Temperature

PSRR VS = ±0.9 V to ±2.75 V

±200

µV/V

Reference Divider Accuracy(2)

±0.002

±0.024

over Temperature

±0.002

±0.050

INPUT IMPEDANCE (3)

Differential

240

Ω

Common-Mode

Ω

INPUT VOLTAGE RANGE

RTI

Common-Mode Voltage Range

VCM

Positive

17.5

Negative

–12.5

Common-Mode Rejection Ratio

CMRR VCM = –10 V to +10 V, RS = 0 Ω

over Temperature

OUTPUT VOLTAGE NOISE (4)

RTO

f = 0.1 Hz to 10 Hz

µVPP

f = 10 kHz

nV/

√Hz

VREF2 = 4.096 V,

RL Connected to GND,

GAIN

(VIN+) – (VIN–) = –10 V to +10 V,

VCM = 0 V

Initial

0.2

V/V

Error

±0.005

±0.024

vs Temperature

±0.035

Nonlinearity

±0.0002

% of FS

OUTPUT

VREF2 = 4.096 V,

(V+) –

Voltage, Positive

(V+) – 0.1

RL Connected to GND

0.02

over Temperature

(V+) – 0.2

VREF2 = 4.096 V,

(V–) +

Voltage, Negative

(V–) + 0.048

RL Connected to GND

0.01

over Temperature

(V–) + 0.070

Current Limit, Continuous to Common

±60

Capacitive Load

See Typical Characteristic

Open-Loop Output Impedance

RO f = 1 MHz, IO = 0

110

Ω

FREQUENCY RESPONSE

Small-Signal Bandwidth

–3 dB

1.5

MHz

Slew Rate

µs

Settling Time, 0.01%

tS 4 V Output Step, CL = 100 pF

µs

(1)

Includes effects of amplifier input bias and offset currents.

(2)

Reference divider accuracy specifies the match between the reference divider resistors using the configuration in Figure 2.

(3)

Internal resistors are ratio matched but have 20% absolute value.

(4)

Includes effects of amplifier input current noise and thermal noise contribution of resistor network.

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