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AT89C5122D-RDRUM データシート(PDF) 84 Page - ATMEL Corporation

部品番号 AT89C5122D-RDRUM
部品情報  C51 Microcontroller with USB and Smart Card Reader Interfaces
PDF  208 Pages
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メーカー  ATMEL [ATMEL Corporation]
ホームページ  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT89C5122D-RDRUM データシート(HTML) 84 Page - ATMEL Corporation

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84
AT83R5122, AT8xC5122/23
4202F–SCR–07/2008
Reset Value = 0000 1100b
Reset Value = XXXX XXX0b
Reset Value = 0000 0000b
Table 53.
Smart Card Transmit Guard Time Register 0 - SCGT0 (S:B4h, SCRS=1)
76
54
32
10
GT7
GT6
GT5
GT4
GT3
GT2
GT1
GT0
Bit Number
Bit Mnemonic
Description
7 - 0
GT[7:0]
Transmit Guard Time LSB
The minimum time between two consecutive start bits in transmit mode is GT[8:0] * ETU. This is equal to ISO IEC
Guard Time +10 (see Guard Time Counter description.
According to ISO IEC 7816,the time between 2 consecutive leading edge start bits can be set between 11 and
266 (11 to 254+12 ETUs).
Table 54.
Smart Card Transmit Guard Time Register 1 - SCGT1 (S:B5h, SCRS=1)
76
54
32
10
--
--
--
-
GT8
Bit Number
Bit Mnemonic
Description
7 - 1
-
Reserved
The value read from these bits is indeterminate. Do not change these bits.
0GT8
Transmit Guard Time MSB
Used together with the Transmit Guard Time LSB in SCGT0 register (Table 53).
Table 55.
Smart Card Character/Block Waiting Time Register 3
SCWT3 (S:C1h, SCRS=0)
76
54
32
10
WT31
WT30
WT29
WT28
WT27
WT26
WT25
WT24
Bit Number
Bit Mnemonic
Description
7 - 0
WT[31:24]
Waiting Time Byte3
Used together with WT[23:0] in registers SCWT2,SCWT1, SCWT0 (see Table 56).



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