LTC1096/LTC1096L

LTC1098/LTC1098L

17

10968fc

Input Data Word

configured to have a single differential input. The conver-

sequence, followed by LSB sequence providing easy

interface to MSB- or LSB-first serial ports.

ing edge of the clock. The input data words are defined

as follows:

Start Bit

goes low is the start bit. The start bit initiates the data

transfer. The LTC1098(L) will ignore all leading zeros which

precede this logical one. After the start bit is received,

the remaining bits of the input word will be clocked in.

next CS cycle.

APPLICATIONS INFORMATION

CLK

CS

POWER

DOWN

SGL/

DIFF

MSBF

B0*

B1

B2

B3

B4

B5

B6

B7

NULL

BIT

Hi-Z

HI-Z

START

ODD/

SIGN

DON'T CARE

MSB-FIRST DATA (MSBF = 0)

MSB-FIRST DATA (MSBF = 1)

10968 F02

CLK

CS

POWER

DOWN

SGL/

DIFF

MSBF

B0

B1

B2

B3

B4

B5

B6

B7

NULL

BIT

Hi-Z

HI-Z

START

ODD/

SIGN

DON'T CARE

B7*

B6

B5

B4

B3

B2

B1

*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY.

(MSB)

(MSB)

SGL/

DIFF

ODD/

SIGN

MSBF

START

MUX

ADDRESS

MSB-FIRST/

LSB-FIRST

10968 AI02