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HC1S25 データシート(PDF) 21 Page - Altera Corporation |
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HC1S25 データシート(HTML) 21 Page - Altera Corporation |
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21 / 110 page ![]() Altera Corporation 3–3 September 2008 Preliminary IEEE Std. 1149.1 (JTAG) Boundary-Scan Support Figure 3–1 shows the timing requirements for the JTAG signals. Figure 3–1. HardCopy Stratix JTAG Waveforms Table 3–3. 32-Bit HardCopy Stratix Device IDCODE Device IDCODE (32 Bits) (1) Version (4 Bits) Part Number (16 Bits) Manufacturer Identity (11 Bits) LSB (1 Bit) (2) HC1S25 0000 0010 0000 0000 0011 000 0110 1110 1 HC1S30 0000 0010 0000 0000 0100 000 0110 1110 1 HC1S40 0000 0010 0000 0000 0101 000 0110 1110 1 HC1S60 0000 0010 0000 0000 0110 000 0110 1110 1 HC1S80 0000 0010 0000 0000 0111 000 0110 1110 1 Notes to Table 3–3: (1) The most significant bit (MSB) is on the left. (2) The IDCODE’s least significant bit (LSB) is always 1. TDO TCK tJPZX t JPCO tJPH t JPXZ tJCP tJPSU t JCL tJCH TDI TMS Signal to Be Captured Signal to Be Driven t JSZX tJSSU tJSH t JSCO tJSXZ |
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