July 2006

ASM3P4200A

rev 0.2

Multi-Output Custom Clock Generator

2 of 7

Notice: The information in this document is subject to change without notice.

Pin Assignment

Output Frequency Selection Table

Selection

Bits

S2

S1

S0

CLK1

(MHz)

CLK2

(MHz)

CLK3

(MHz)

CLK4

(MHz)

CLK5

(MHz)

CLK6

(MHz)

CLK7

(MHz)

CLK8*

(MHz)

CLK9*

(MHz)

0

0

0

20

36.6

31.6

39.5

OFF

84

63

50

20

0

0

1

20

36.6

31.6

39.5

OFF

84

63

60

20

0

1

0

20

36.6

31.6

39.5

OFF

36

63

50

20

0

1

1

20

36.6

31.6

39.5

OFF

84

63

75

20

1

0

0

-

-

-

-

-

-

-

-

-

1

0

1

-

-

-

-

-

-

-

-

-

1

1

0

-

-

-

-

-

-

-

-

-

1

1

1

-

-

-

-

-

-

-

-

-

* CLK8 and CLK9 are Spread Spectrum Clocks

16pi TSSOP

ASM3P4200A

XOUT

GND

S2

CLK9

VCC

GND

CLK8

OE

21

22

24

25

26

27

28

23

VCC

CLK2

VCC

S0

S1

XIN / CLK

VCC

CLK1

8

7

5

4

3

2

1

6

CLK5

VCC

CLK4

GND

VCC

CLK3

14

13

11

10

9

12

CLK7

GND

CLK6

VCC

GND

GND

15

16

18

19

20

17

28 pin TSSOP