PCS812 datasheet(2/8 Pages) PULSECORE

2 / 8 page

January 2007

PCS811/PCS812

rev 0.1

5-Pin µP Voltage Supervisor with Manual Reset

2 of 8

Notice: The information in this document is subject to change without notice.

Pin Diagram

Pin Description

Block Diagram

Pin#

PCS811

PCS812

Pin Name

Description

GND

Ground.

No Connection

RESET

RESET is asserted LOW if VCC falls below VTH. RESET remains LOW for atleast

140ms (TRST) once VCC exceeds the Threshold. In addition, RESET is active LOW

as long as the manual reset (MR) is low.

RESET

RESET is asserted HIGH if VCC falls below VTH. RESET remains HIGH for atleast

140ms (TRST) once VCC exceeds the threshold. In addition, RESET is active HIGH

as long as the manual reset (MR) is low.

Manual Reset Input. A logic LOW on MR asserts reset. Reset remains active as

long as MR is LOW and for at least 180ms (TMRST) once MR returns HIGH. The

active low input has an internal 20k

Ω pull-up resistor. The input should be left

open if not used. It can be driven by TTL or CMOS logic or shorted to ground by a

switch.

VCC

Power supply input voltage (3.0V, 3.3V, 5.0V)

GND

VCC

RESET (RESET)

PCS811

(PCS812)

RESET Generator

Bandgap

RPULL_UP

20K

VCC

GND

RESET (RESET)

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