PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM

Pin No.

Pin Name

1

2

GND

3

OUTPUT

4

GND

5

GND

(Top View)

1

2

34

5

6

(Bottom View)

6

5

43

2

1

(Top View)

1

2

34

5

6

6

INPUT

PRODUCT LINE-UP OF 5 V-BIAS SILICON MMIC MEDIUM OUTPUT POWER AMPLIFIER

Ω)

Part No.

(mA)

(dB)

NF

(dB)

(dBm)

(dBm)

Package

Marking

26

15.0

6.5

−

+10.0

6-pin super minimold

C1D

25

23.0

5.0

−

+11.5

C1E

22

33.0

3.5

−

+13.5

C1F

25

23.0

6.0

−

+8.5

C2L

19

23.0

4.5

+6.5

+12.0

C3J

24.5

32.5

Note

3.7

Note

+9

Note

+15.5

Note

C3M

15.5

25.0

5.3

+7.5

+13.0

C3N

26

32.8

4.0

+11

+15.5

C3S

24

38

2.6

+11

+15.5

6-pin lead-less minimold (1511 PKG)

6U

Note

Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.

Data Sheet PU10734EJ01V0DS

2