MCP616-ISLASHP datasheet(16/38 Pages) MICROCHIP

16 / 38 page

MCP616/7/8/9

DS21613C-page 16

FIGURE 4-3:

Example Circuit for

Calculating DC Offset.

To calculate the DC bias point and DC offset, convert

the circuit to its DC equivalent:

• Replace capacitors with open circuits

• Replace inductors with short circuits

• Replace AC voltage sources with short circuits

• Replace AC current sources with open circuits

• Convert DC sources and resistances into their

Thevenin equivalent form

The DC equivalent circuit for Figure 4-3 is shown in

Figure 4-4.

FIGURE 4-4:

Equivalent DC Circuit.

Now calculate the nominal DC bias point with offset:

EQUATION 4-1:

Use the worst-case specs and source values to

determine the worst-case

output voltage range and

offset for your design. Make sure the common mode

input voltage range and output voltage range are not

exceeded.

4.3

Rail-to-Rail Output

There are two specifications that describe the output

swing capability of the MCP616/7/8/9 family of op

amps. The first specification (Maximum Output Voltage

Swing) defines the absolute maximum swing that can

be achieved under the specified load conditions. For

instance, the output voltage swings to within 15 mV of

the negative rail with a 25 k

Ω load tied to VDD/2.

Figure 2-33 shows how the output voltage is limited

when the input goes beyond the linear region of

operation.

The second specification that describes the output

swing capability of these amplifiers is the Linear Output

Voltage Range. This specification defines the

maximum output swing that can be achieved while the

amplifier still operates in its linear region. To verify

linear operation in this range, the large-signal DC

Open-Loop Gain (AOL) is measured at points inside the

supply rails. The measurement must meet the specified

AOL conditions in the specification table.

MCP61X

VOUT

R3 C3

MCP61X

VOUT

VEQ

REQ

------------------

⋅

4 || R5

VOOS = GN [VOS + IB ((R1 ||R2) – REQ)

– IOS ((R1 ||R2 ) + REQ ) / 2]

VCM = VEQ – (IB + IOS /2) REQ

VOUT = VEQ (GN ) – V1 (GN – 1) + VOOS

2 R1

⁄

Where:

op amp’s noise gain (from the

non-inverting input to the

output)

VOOS

circuit’s output offset voltage

VOS

op amp’s input offset voltage

op amp’s input bias current

IOS

op amp’s input offset current

VCM

op amp’s coommon mode

input voltage

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