24AA1025/24LC1025/24FC1025

DS21941F-page 4

© 2008 Microchip Technology Inc.

FIGURE 1-1:

BUS TIMING DATA

16

Input filter spike suppression

(SDA and SCL pins)

—

50

ns

All except, 24FC1025 (Note 1 and Note 3)

17

Write cycle time (byte or page)

—

5

ms

3 ms, typical

18

Endurance

1 M

—

cycles 25°C (Note 4)

AC CHARACTERISTICS (Continued)

Industrial (I):

Param.

No.

Sym.

Characteristic

Min.

Max.

Units

Conditions

Note 1:

2:

As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum

300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3:

suppression. This eliminates the need for a TI specification for standard operation.

4:

This parameter is not tested but established by characterization. For endurance estimates in a specific application,

please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.

5:

Max. clock frequency is 100 kHz for E-temp devices <4.5V. 1.7-2.5V (100 kHz) timings must be used.

6:

(unprotected)

(protected)

SCL

SDA

IN

SDA

OUT

WP

5

7

6

16

3

2

89

13

D4

4

10

11

12

14