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ISO7421 データシート(PDF) 10 Page - Texas Instruments |
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ISO7421 データシート(HTML) 10 Page - Texas Instruments |
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10 / 18 page ![]() REGULATORY INFORMATION LIFE EXPECTANCY vs WORKING VOLTAGE 10 100 0 250 500 750 1000 V – WorkingVoltage – V IORM 880 120 V at560V IORM 28 Years G001 IEC SAFETY LIMITING VALUES PACKAGE THERMAL CHARACTERISTICS ISO7421, ISO7421M SLLS984 – JUNE 2009....................................................................................................................................................................................................... www.ti.com VDE CSA UL Certified according to IEC Approved under CSA Component Recognized under 1577 Component Recognition 60747-5-2 Acceptance Notice Program(1) File number: pending (40016131) File number: pending (1698195) File number: pending (E181974) (1) Production tested ≥ 3000 Vrms for 1 second in accordance with UL 1577. Figure 4. Life Expectancy vs Working Voltage Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the I/O can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier, potentially leading to secondary system failures. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT θ JA = 212°C/W, VI = 5.5 V, TJ = 170°C, TA = 25°C 124 Safety input, output, or supply IS mA current θ JA = 212°C/W, VI = 3.6 V, TJ = 170°C, TA = 25°C 190 TS Maximum case temperature 150 °C The safety-limiting constraint is the absolute-maximum junction temperature specified in the Absolute Maximum Ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Characteristics table is that of a device installed in the JESD51-3, Low-Effective-Thermal-Conductivity Test Board for Leaded Surface-Mount Packages and is conservative. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance. (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Low-K thermal resistance(1) 212 θ JA Junction-to-air thermal resistance °C/W High-K thermal resistance(1) 122 θ JB Junction-to-board thermal resistance 37 °C/W (1) Tested in accordance with the low-K or high-K thermal metric definitions of EIA/JESD51-3 for leaded surface mount packages 10 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): ISO7421 ISO7421M |
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