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7843A–AERO–10/09

AT68166HT

Typical Applications

This section shows standard implementations of the AT68166HT in applications.

32-bit mode

application

When used on a 32-bit (word) application, the module shall be connected as follow :

•

The 32 lines of data are connected to distinct data lines

•

The four CSx are connected together and linked to a single host CS output

•

Each one of the four WEx is connected to a dedicated WE line on the host to allow byte, half

word and word format write.

Figure 5. 32-bit typical application ( 1 SRAM bank)

16-bit mode

application

When used on a 16-bit (half word) application, the module can be connected as presented in the

following figure. This allows use of a single AT68166HT part for two SRAM memory banks.

All input controls of the AT68166HT not used in the application shall be pulled-up.

Figure 6. 16-bit typical application (two SRAM banks)

8-bit mode

application

When used on a 8-bit (byte) application, the module can be connected as presented in the fol-

lowing figure. This allows use of a single AT68166HT part for up to four SRAM memory banks.

All input controls of the AT68166HT not used in the application shall be pulled-up.

Figure 7. 8-bit typical application (two SRAM banks)

CS[3:0]

OE

WE[3:0]

A[17:0]

I/O[31:0]

AT68166HT

RAMOE0*

AD

TSC695F

A[27:0]

D[31:0]

D[31:0]

A[19:2]

RWE[3:0]*

RAMS0*

A[19:2]

D[31:0]

A[17:0]

I/O[15:0]

AT68166HT

A

D

TSC695F

A[27:0]

D[31:0]

D[31:16]

A[18:1]

A[18:1]

D[31:0]

I/O[31:16]

D[31:16]

CS[1:0]

WE[1:0]

RWE0*

RAMS0*

CS[3:2]

WE[3:2]

RWE0*

RAMS1*

OE

RAMOE[1:0]*

A[17:0]

I/O[7:0]

AT68166HT

A

D

TSC695F

A[27:0]

D[31:0]

D[31:24]

A[17:0]

A[17:0]

D[31:0]

I/O[15:8]

D[31:24]

CS[0]

WE[0]

RWE0*

RAMS0*

CS[1]

WE[1]

RWE0*

RAMS1*

OE

RAMOE[1:0]*

CS[3]

WE[3]

RWE0*

RAMS2*

CS[2]

WE[2]

RWE0*

RAMS2*

I/O[23:16]

D[31:24]

I/O[31:24]

D[31:24]