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ST3003 データシート(PDF) 11 Page - Sitronix Technology Co., Ltd. |
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ST3003 データシート(HTML) 11 Page - Sitronix Technology Co., Ltd. |
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11 / 11 page ![]() ST3003 The above information is the exclusive intellectual property of Sitronix Technology Corp. and shall not be disclosed, distributed or reproduced without permission from Sitronix. Sitronix Technology Corp. reserves the right to change this document without prior notice and makes no warranty for any errors which may appear in this document. Sitronix products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where products failure could result in injury, or loss of life, or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. Ver 0.8 11/11 2007-06-12 8 8.. R RE EV VIIS SIIO ON N REVISION DESCRIPTION PAGE DATE 0.2 First release 2005/05/12 0.3 1. Modify DAC driving capacity 2. Change IREF to DACVDD33A, change CLICK to DACVSS33A 3. Rename DACVDD33A to DACOVDD33A, rename DACVSS33A to DACOVSS33A 1 2,4,8,9,10 2,4,8,9,10 2005/06/27 0.4 1. TEST[2:0] wire to GND 2. WR, RD cascade 120 Ohm and parallel 10p capacitor 3. ECLK cascade 100 Ohm to low noise 4. Remove R-Oscillator function 1 10 10 1,3,10 2005/0705 0.5 1. System low voltage changes from 2.7V to 3.0V 2. The resistor in RD/WR changes from 120Ohm to 220Ohm 1 10 2005/08/02 0.6 1. Change PLL output frequency from 32MH to 28MHz 2. Add inductor and capacitor before power input, revise regulator output capacitor, DACVDD33A and DACOVDD33A power come from battery, add 4MHz crystal label 1 10 2005/09/05 0.7 1. Add CMODE, ECLK, TEST pins descriptions 2. Revise PMODE pin parallel interface select description 3. Revise output driving/sinking, input low/high, and input pull-up/pull-down resistor DC electrical characteristics 4. Revise Read access time from 10ns to 25ns 5. Remove external DAC/ADC block, DC2DC block. Add headphone jack and CMD pin cascade resistor and parallel capacitor. Revise DAC power circuit. Add note item 2 to 4 3 4 5 7 10 2006/02/22 0.8 1. Revise parallel interface timing diagram(CWD pin change to CMD Pin) 2. Application circuit diagram Add parallel capacitor and cascade resistor circuit on CS pin 6 10 2006/05/02 |
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